1. Technical Field
The present invention relates to display devices and, more particularly, to a display device including a plurality of shift registers.
2. Related Art
To date, display devices including a plurality of shift registers have been well known to those skilled in the art (refer to, for example, JP-A-2003-122322).
In JP-A-2003-122322 described above, a liquid crystal display apparatus including switch sections (HSW) located between data lines and image signal lines, and further, shift registers configured to generate control signals (i.e., sampling pulses) for performing control of turning on/off of the switch sections has been disclosed. The liquid crystal display device disclosed in JP-A-2003-122322 described above is configured to generate the sampling pulses on the basis of the rising edges and falling edges of a clock signal and sequentially output the sampling pulses to the switch sections.
However, the liquid crystal display device disclosed in JP-A-2003-122322 described above is configured to, for example, generate the sampling pulse on the basis of the rising edge of the clock signal at a first stage of the shift registers, and on the basis of the falling edge of the clock signal at a second stage of the shift registers. Therefore, a difference between a rising time of the clock signal (i.e., a period of time necessary for the rising edge of the clock signal to complete rising from an L-level to an H-level: tr) and a falling time of the clock signal (i.e., a period of time necessary for the falling edge of the clock signal to complete falling from an H-level to an L-level: tf) due to variations of the characteristics of driving sections and circuit elements causes a difference between the pulse width of the sampling pulse generated on the basis of the rising edge of the clock signal and that generated on the basis of the falling edge of the clock signal. Therefore, the pulse width of each of the two kinds of sampling pulses becomes unequal, and thus, the inequality causes a difference between durations while respective groups of the switch sections, corresponding to the two kinds of the sampling pulses, are under the turned-on condition, and further, the difference leads to a disadvantage in which the writing time of video signals is different for each group of pixels which corresponds to one of the two groups of the switch sections.
Furthermore, when, upon receipt of a sampling pulse, the switch sections connected to the data lines turn on, the level of a COM voltage is likely to vary due to parasitic capacitance being generated between the data lines and the wiring that is at the COM voltage. In this case, under a normal condition, the level of the COM voltage, which varies upon turning on of the switch sections, subsequently returns to the original level while the switch sections are being turned on. On the contrary, in the case where the pulse widths of two respective kinds of the supplied sampling pulses are unequal, the inequality causes a difference between durations while two respective groups of the switch sections (HSW) are under the turned-on condition, and further, the difference leads to a disadvantage in which the ratio of the returned level of the COM voltage to the original level of the COM voltage is different for each group of pixels which corresponds to one of the two groups of the switch sections.
Thus, the disadvantages described above cause a difference in the brightness of each group of pixels, which leads to diminishing of the quality of image display.